Frodo, Frodo PC and Frodo SC
Frodo comes in three 'flavours' that allow you to decide between speed
and accuracy of the emulation.
The line-based emulation 'Frodo'
Frodo is a line-based emulation, i.e. the activities that happen
in parallel during one video line in the real C64 are emulated one after
the other for the different chips. This offers a reasonable degree of
precision of the emulation at a decent speed. There are some things that
cannot be emulated with this technique, but it works fine with about
80% of all C64 programs and it is also the fastest of the three Frodo
The improved line-based emulation 'Frodo PC'
Frodo PC is also a line-based emulation but it has some improvements
over the standard Frodo:
Programs that don't work on the standard Frodo or that produce an
"Illegal jump to I/O space" message might work with Frodo PC. However,
Frodo PC is a bit slower.
- Code in chip registers can be executed
- Correct calculation of 6510 instruction cycles
- More precise CIA emulation
The single-cycle emulation 'Frodo SC'
Frodo SC is a special version of Frodo that doesn't work with a
line-based emulation but instead with a cycle-based one. That means that
the emulator switches between 6510 and VIC in every emulated ø2 clock
phase. By doing this, Frodo SC achieves an extreme precision (nearly all
$d011 and $d016 effects can be emulated), but at the expense of speed.
In the settings options, Frodo SC differs from Frodo/Frodo PC in only
a few points:
Apart from that, Frodo SC is operated in the same way as Frodo and also
uses the same settings. Frodo SC has only a few incompatibilities to a
- The "Cycles per line" settings are not available as the timing of Frodo SC is hardcoded
- The "Clear CIA IRC on write" hack is not necessary
- On the left and right side of the screen, sprites are not clipped but blanked out
- Sprite collisions are only detected within the visible screen area (excluding borders)
- The sprite data fetch ignores the state of BA
- On BA low and AEC high, the VIC always reads $f in D8-D11
- Color register modifications are visible 7 pixels too late
- The TOD clock should not be stopped on a read access, but be latched
- The SDR interrupt is faked
- Some small incompatibilities with the CIA timers
- The readable SID registers are not emulated correctly